The agent converts specifications into RTL and analyzes design updates for power, performance and area targets.
Cadence has introduced an RTL Generation Agent for the Cadence ChipStack AI Super Agent. The agent automates front-end digital design and verification tasks, including power, performance and area (PPA)-driven specification-to-RTL generation, RTL analysis and refinement using natural-language prompts. It extends the ChipStack AI Super Agent’s capabilities from verification and debugging to RTL creation and optimization.
In early evaluations, the RTL Generation Agent achieved an average area reduction of 24% and power reduction of 18% compared with code generated solely by a foundation model. Cadence also reported 100% functional accuracy in the evaluated RTL.
Cadence’s approach uses a hierarchy of AI systems in which super agents coordinate task-specific agents that use electronic design automation (EDA) software configured for agentic workflows. The RTL Generation Agent converts high-level specifications into RTL designed to meet specified PPA targets.
Customer evaluation with Honda
Honda R&D is evaluating the RTL Generation Agent on automotive system-on-chip (SoC) designs. These applications require RTL that meets safety requirements while operating within defined power and cost limits.
RTL updates and early PPA analysis
The RTL Generation Agent also supports updates to existing RTL when design requirements change. Engineers can describe changes to architecture, PPA targets or functionality at a high level, after which the agent applies the updates and analyzes the resulting PPA and functional behavior.
This workflow is intended to reduce the effort required to revise legacy RTL for new design requirements and provide earlier feedback on potential impacts to power, performance and area.
Expanding agentic AI capabilities for chip design
The new capabilities support Cadence’s “Design for AI and AI for Design” strategy, which applies AI to chip design workflows and develops hardware and software for AI applications. The RTL Generation Agent expands the ChipStack AI Super Agent portfolio into RTL generation and optimization.
Cadence also offers the InnoStack and ViraStack AI Super Agent portfolios for applying AI across digital design, analog design and verification workflows.
Availability
The expanded ChipStack and InnoStack AI Super Agent capabilities are expected to be available to selected early-access customers in the fourth quarter of 2026.
For more information, visit cadence.com.
