Siemens introduces AI-based IC verification in Questa One

Questa One shifts integrated circuit verification toward a more automated and adaptive process.

Siemens Digital Industries Software introduced the Questa One verification software portfolio, combining connectivity, a data-driven approach, and AI to improve the efficiency and scalability of the integrated circuit (IC) verification process.

Questa One delivers faster engines, enables faster engineers and requires fewer workloads to support the largest, most complex designs from IP to System-on-a-chip (SoC) to Systems, and was developed with advanced 3D-ICs, chiplet-based designs and software-defined architectures in mind.

Siemens has worked with industry leaders to develop the Questa One smart verification solution that delivers a connected, data-driven, scalable solution that breaks the Verification Productivity Gap 2.0 bottleneck, whereby the increasing complexity of technologies such as 3D-ICs, chiplet-based designs and software-defined architectures are further compounded by a critical talent shortage, and growing demands for enhanced security, lower power consumption, reliability and sustainability.


The Questa One smart verification solution encompasses multiple technical breakthroughs including:

  • Questa One Coverage Acceleration software has achieved coverage goals 50x faster than traditional testbench solvers combining higher/faster coverage results with the benefits of Universal Verification Methodology (UVM) constrained random test generation.
  • Questa One DFT Simulation Acceleration software has achieved 8x faster gate-level design for test (DFT) serial pattern simulations leveraging Questa One Parallel Simulation software and is tightly integrated with the industry-leading Tessent Streaming Scan Network (SSN) architecture.
  • Questa One Fault Simulation Acceleration software has delivered 48x faster performance and supports both functional safety and DFT fault simulation applications. It uniquely supports the User Defined Fault Modeling (UDFM) capability in Tessent.
  • Questa One Stimulus Free Verification software empowers engineers to achieve new levels of productivity. Its unique approach of combining engines and unifying applications has shown to reduce overall processing times from over 24 hours to under 1 minute on complex open source SoC level reference designs. The integration of 20 different stimulus-free analyses, AI and automation deliver new solutions such as linting with auto-correction and generative AI SVA property creation and verification.
  • Questa One Avery Verification IP software is based on Avery’s high-quality VIP and high-coverage Compliance Test Suites (CTS). Protocol-aware debug and protocol-aware coverage analytics help increase productivity, and accelerated VIP enables the same CTS, testbench and stimulus on Questa One Sim to be re-used on Veloce CS emulation and prototyping systems.

The Questa One smart verification solution is founded on three core principles.

  • Questa One Connected Verification software connects engineers, EDA tools and verification IP to form a cohesive ecosystem for comprehensive and seamless verification, validation, and test across Siemens’ Questa One, Tessent DFT and Veloce CS emulation and prototyping systems.
  • Questa One Data-Driven Verification software leverages the power of data through AI-powered analytics to bring new insights and to improve verification productivity. Applications of generative, prescriptive and predictive machine learning technologies enable engineers to achieve the highest levels of verification with the fewest resources.
  • Questa One Scalable verification software delivers acceleration and automation second-to-none, with speeds that deliver the fastest verification closure and the highest degree of confidence.

Availability

The Questa One smart verification solution will be available in June 2025.

For more information, visit siemens.com.