Hi There,
I am Pooran Thapa, Technical Recruiter from Quantum World. I have got interesting Job opportunities across the USA. Below is the Job Description.
If you are looking for a job change kindly share your resume on pooran@quantumworld.us or call me at 805-222-0532 Ext-127

Job Title: Chip Packaging Design Engineer
Location: Mountain View, CA (Onsite) 
Experience level: 5+ years 

Necessary experience
•5+ years’ experience completing layouts of high pin count, multi-layer organic build-up packages using Cadence APD and SiP package design tools.
•Creating die and BGA symbols from scratch or from spreadsheet inputs
•Setting up design environment, including tech files, stack ups, and constraints
•Setting up Constraint Manager from scratch for complex packages (diff pair creation, multiple power supplies, net and zone specific constraints.
•Routing signals and matching length both manually and using tool features
•Design file management and documentation from initiation to final signoff
•Generation of POD
•Solid knowledge of top package suppliers design rules and basic manufacturing practices

Desired experience 
•Experience with Cadence Orbit I/O
•2.5D interposer design layout experience using Cadence SiP
•Experience with Synopsys tools for 2.5D interposer design
•Experience writing and implementing custom scripts in Cadence tools
•Familiar with Cadence PVS