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SSD Hardware Principle PCIe Engineer
Company Info
CriticalRiver Inc
San Francisco, CA, United States
Phone:
408-882-9363
Web Site:
Company Profile
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Title:
SSD Hardware Principle PCIe Engineer
Location:
Boise, ID
Job ID:
71866
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Job Description:
Greetings of the day,
Hope you are doing good,
Please go through below JD and let me know your interest with updated resume and expected rate.
Role: SSD Hardware Principle PCIe Engineer
Location: Boise, ID (Remote/Hybrid)/San Jose, CA
Duration: C2H/C2C
Duties and Responsibilities
Experience writing specifications and converting them to design
Experience with bring up and lab debug of SoCs and associated hardware
Experience with commercial PCIe IPs such as Synopsys and Cadence. Experience in communicating with IP vendors
Creating, defining, and developing system validation environment and test suites for evolving PCIe protocol validation
Using and applying system level tools and techniques to ensure functionality to specification
Development of methodologies, execution of validation plans, and debug of failures
Collaboration with Pre-silicon Validation teams in improving post-silicon test content and providing feedback for future on die debug features
You will be involved in PCIe IP validation in the context of System level use cases for high-speed SoC devices
Driving exploration of IP validation methodology, platform and infrastructure enablement to improve process and efficiency
Critical Skills
7+ years of total experience inclusive of the following areas:
PCIe protocol (e.g Gen3, Gen4, Gen5, PCIe Host systems, PCIe IP bring up and validation, etc.)
Experience in post silicon validation methodologies
Experience in developing programming languages such as TCL, Python, C-programming
Experience in handling various high-speed test and measurement equipment such as ATE tester, high bandwidth real time/sampling oscilloscope, high frequency pulse/signal, power supplies
Experience in SoC architecture/design/validation is an added advantage
Experience in PCIe Link equalization algorithm, architecture and DFD
Good PCB design experience on high speed signals routing guideline and review, power copper routing and review, design for EMI/ESD protection.
Design for signal integrity, including SerDes, power and interconnect.
Develops solutions to complex signal integrity problems, which require ingenuity and creativity
Simulation skills with SPICE and IBIS. Experience with Hspice
Thanks & Regards
Karunakar Reddy
karunakar.reddy@criticalriver.com
Phone # : 408-882-9363
Critical River INC -
www.criticalriver.com
Linkedin:
https://www.linkedin.com/in/karunakar-reddy-8a79051a/
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