GUC Adopts Ansys Simulation Workflow and Expedites Next-Gen IC Designs

Ansys’ new workflow helps GUC run simulations two to three times faster.

Ansys, a Pennsylvania-based design software company that specializes in multiphysics modeling counts among its customers Global Unichip Corporation (GUC), a Taiwanese-based application-specific integrated circuit (ASIC) company. GUC has adopted the Ansys simulation workflow to accelerate its development and manufacturing processes.

GUC is a die-to-die interconnect solution provider for ASICs. (Image source: Ansys.)

GUC is a die-to-die interconnect solution provider for ASICs. (Image source: Ansys.)

According to GUC, the Ansys HFSS 3D simulation software has allowed the company to run simulations that are two to three times faster than before, as well as reduce its model setup time for optimizing design performance from hours to minutes, delivering first-pass design success and reducing overall R&D costs. This will allow GUC’s engineers to devote more time and energy to product design and innovation while improving current output quantity and quality.

Igor Elkanovich, GUC’s CTO, reports that the “HFSS 3D Layout helps our engineering team decrease Advanced-IC design complexity, integrate heterogeneous chips and improve multi-chip performance to ensure customers receive new AI, HPC and Data Center Networking products much sooner.”

According to GUC, incorporation of the Ansys workflow has allowed the company to quickly and efficiently deploy product and service enhancements through novel solutions powered by HFSS. This has resulted in across-the-board improvements in GUC’s Chip-on-Wafer-on-Substrate (CoWoS), Integrated Fan-Out (InFO), and interposer designs. This includes the newly announced GUC multi-die interLink (GLink), which is used in data center networking applications, high-powered computing, and artificial intelligence.

Ansys HFSS is used for 3D electromagnetic simulation. (Image source: Ansys.)

Ansys HFSS is used for 3D electromagnetic simulation. (Image source: Ansys.)

“Through this enhanced workflow, Ansys increases the productivity for GUC Advanced-IC designers by significantly simplifying the design process,” said Shane Emswiler, senior vice president at Ansys. “Leveraging HFSS 3D Layout, GUC engineers are swiftly creating fully parametric models, performing design studies of electronic packaging and exploring more design options than ever to evaluate tradeoffs prior to production—delivering considerable reductions in development time and expense.”