Composite Amplifiers Part One: When Cascaded Amplifiers are Not an Option

The first part of our series explaining the nature, characteristics, benefits, and caveats of composite amplifiers.

This is the first part in our series explaining the nature, characteristics, benefits, and caveats of composite amplifiers. The four parts of the series include:

Cascaded Amplifier Systems

A cascaded amplifier system is a multiple-stage amplifier system in which the output of a given amplifier is used to drive the input of the next successive stage. This arrangement makes it possible to achieve large voltage gains. It also permits the amplifier system to have input resistance equal to that of the first stage and an output resistance established by the last stage. The general cascaded amplifier system is shown in Figure 1.

Figure 1. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 1. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

As indicated in Figure 1, the overall voltage gain Av is the ratio of the load voltage to the voltage delivered to the amplifier system’s input. The overall voltage gain is given by the product of the individual output loaded voltage gains. The individual decibel gains may be added together.

Op amps employed in various applications may be called upon to amplify small signals, requiring them to operate with high closed-loop gains in the hundreds or thousands of volts per volt (V/V). If the required gain is in the range of tens to a few hundred V/V, a single precision op amp can provide the desired electrical performance. However, once the gain requirements become significantly higher, a single-stage approach may not yield adequate results.

We extend our understanding of a cascaded amplifier system when we examine the amounts of negative feedback required. For the purposes of this discussion, we shall assume our goal is to obtain an amplifier system with a gain of 1000, or 1V/mV. Consider Figure 2.

Figure 2. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 2. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

The OPA2131UA op amp is described as a “General-Purpose FET-Input Op Amp.” It sports a low input offset voltage (VOS) of 750 µV, a voltage spectral density of 15 nV/sqrt(Hz),  and a large 4 MHz gain-bandwidth product (fT). To achieve the required voltage gain we see the feedback resistor (R2) is 100 kΩ and its input gain resistor (R1) is only 100 Ω.Resistor R3 provides bias current compensation and serves to protect the input of the op amp. The value of R3 is set equal to the parallel combination of R1 and R2. We need to determine the voltage gain, the bandwidth, the output noise voltage spectral density, and the output offset voltage. The voltage gain (Av) and the high-end corner frequency (fH) are determined in the usual fashion:

The large closed-loop voltage gain has rendered a low corner high-end frequency (fH). The bandwidth is small. Now we find the output offset. By convention, the DC offset (DC noise) and AC noise sources are applied individually to the non-inverting input terminal. The resulting DC output and the resulting AC output noise are determined by multiplying the quantities by the non-inverting amplifier gain. The non-inverting amplifier gain in this case is called the noise gain.

The noise gain is the same as the signal gain for a non-inverting amplifier. If this output DC offset is too large, an op amp with an even lower value of VOS is required. The output noise voltage spectral density is also required.

Using Multisim to Check Our Single-Stage Amplifier Results

Any circuit simulation software can be used to check our results, but PSpice and LTSpice are among the more popular (free)  choices. This writer opted for Multisim because it documents what measurements are made graphically. Multisim was used to simulate the circuit as shown in Figure 3. The instruments (multimeter, oscilloscope, and Bode plotter) are connected as indicated.

(Note that in the “real world” the instrumentation becomes part of the circuit. Too much instrumentation used simultaneously can affect the circuit under test and cause problems, like oscillation because of coupling between probes or distortion due to ringing produced by stray capacitances and inductances. Worst of all, you may be noticed by a concerned manager who may feel grimly determined to try and help you.)

The instrumentation displays are also provided in Figure 3. A DC output offset of 42.6 mV is indicated. This is low compared to out worst-case calculation. In fact, it is even less than the typical VOS of ± 0.2 mV, which would produce 0.2002 V! A chat with a manufacturer’s application engineer is prudent. (Actually, I did an on-line chat and was told 42.6 µV is the typical value.) The oscilloscope indicates less than the ideal 10 Vp-p. This is probably due to quantization error (the difference between the analog signal and the closest available digital value at each sampling instant).

Figure 3. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 3. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

The Bode plotter shows that high-frequency roll-off is 5.312 kHz, which is larger than our predicted value of 3.996 kHz. However, we used the typical value of fT since the manufacturer did not provide a maximum value. However, many physical parts can perform better than the published typical values. Due diligence suggests this should be another topic of discussion when chatting with the application engineer.

We shall use these values to contrast the performance of other design approaches. We have the required voltage gain. For the same voltage gain, can we widen the bandwidth? Can the DC offset and noise be lowered?

How About Using a Cascaded Amplifier System?

Lots of voltage gain reduces bandwidth. Suppose we spread the required voltage gain out over a couple of op amps? In a cascaded amplifier the voltage gains multiply so we can achieve a large voltage gain of 1000.

In high-gain applications, a cascaded system is a better approach. A cascaded system is shown in Figure 4. Note the OPA2131UA is a dual op amp unit.

Figure 4. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 4. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Since the voltage gains multiply in a cascaded system, we take the square root of the desired gain of 1000. This gives 31.6. The nearest standard 1%-tolerance values for all resistors are indicated throughout the circuit. Observe that two precision resistors have been used for the feedback resistor. This approach improves the gain accuracy. We analyze the first stage:

The second stage will have identical (stand-alone) values of Av2 = 31.7 and fH2 = 126.18 kHz. The next task is to put everything together to get the overall characteristics of the cascaded system.

The individual stage gains multiply in a cascaded system. We see that we are close to our target gain of 1000. In fact, 1005 is only 0.5% larger than 1000.

Next, we determine the high-end corner frequency (fH(total)) for the cascaded system. Since we have a direct-coupled system there is no low-frequency roll off and fH is the system bandwidth. It can be determined by employing Equation 1. Equation 1 is based on the constraint we have n identical stages:

In practice, usually only two, three, and in rare instances four stages are used. As the number of stages increases, component values become more difficult and expensive to procure. Now we determine the high-end corner frequency for the cascaded amplifier by applying Equation 1. Since we have two stages, n is equal to 2.

Next, we need to determine the DC offset voltage at the output of the cascaded system. We can invoke the principle of superposition. However, since we have drawn the equivalent circuit, we add the two DC sources and treat the total as a single input to the non-inverting amplifier. Consider Figure 5:

Figure 5. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 5. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

This is about the same as the DC offset at the output of the single, high-gain stage, which was 751 mV. We now examine the noise as shown in Figure 6. The equivalent circuit is like Figure 5 for the DC offset, but there is one important difference: these are uncorrelated (random) noise voltage sources and cannot be added directly. They must be combined using the root sum of squares.

By superposition we handle each source independently. Its value is multiplied by the stage voltage gain of 31.7. The output noise Vn(output) is determined by using the root sum of squares.

The output noise of the cascaded system is nearly identical to the output noise of the single-stage approach (15.02 µV/sqrt(Hz). In large gain applications, it is better to use a cascaded system rather than a single stage. The cascaded system will have a larger bandwidth but will not provide a DC output offset advantage nor an output AC noise advantage.

Figure 6. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 6. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Using Multisim to Check the Cascaded Amplifier Results

Multisim was used to simulate the cascaded amplifier as shown in Figure 7. The Multisim results are provided in Figure 8. The simulation indicated a voltage gain of 999, and a closed-loop corner frequency of 115.99 kHz. The corner frequency is considerably higher than our prediction of 81.21 kHz. The output DC offset is only 44.505 mV compared to our calculated value of 778 mV. Again, these results should be discussed with an application engineer. (Again, a chat between this writer and a Texas Instruments technician revealed the nominal DC offset is 44.5 µV, which agrees perfectly with the simulation. The prediction of the closed-loop corner frequency indicates the gain bandwidth product is higher than the published typical value. The technician supported our result.)

Figure 7. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 7. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)
Figure 8. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Figure 8. (Used with author’s permission from Discrete and Integrated Electronics Analysis and Design for Engineers and Engineering Technologists.)

Review and Conclusions

When a large voltage gain is required, a single amplifier stage may not be adequate as the corresponding bandwidth will be small. Using multiple stages in a cascaded amplifier system can be used to achieve a large voltage gain and still have a wide bandwidth. A cascaded amplifier does not offer any advantages in the output DC offset nor the AC noise that appears at the system output. Each stage will contribute to the output DC offset and noise. While the first stage dominates, the second stage will contribute slightly.

In our next installment, we’ll examine the composite amplifier and discover the advantages it offers in terms of output DC offset and AC noise.