Ansys and UMC empower chip designers with certified simulation tools.
Ansys announced yesterday that the UMC semiconductor foundry has certified Ansys’ multiphysics simulation tools for the latest three-dimensional integrated circuit (3D-IC) wafer-on-wafer (WoW) chip technology. As a result, engineers and chip designers can use Ansys’ semiconductor simulation tools, such as Ansys RedHawk-SC and Ansys RedHawk-SC Electrothermal, to optimize their 3D-IC WoW designs for power, efficiency, signal integrity, thermal profiles and performance. Once engineers complete these analyses and their designs are ready for production, the UMC foundry can then process, fabricate and manufacture the chips.

Traditionally, electronic chip design has been limited horizontally, with silicon wafers placed side-by-side. In contrast, 3D-IC WoW technology stacks these wafers vertically. 3D-IC WoW applications encompass edge AI, graphics processing, wireless communications, data centers and the cloud.
“Ansys and UMC’s 3D-IC solutions address complex multiphysics challenges to meet stringent power, performance, thermal and reliability requirements,” said John Lee, vice president and general manager of the electronics, semiconductor and optics business unit at Ansys. “Ansys’ dual-approach with both chip- and system-aware design solutions enable mutual customers to accelerate design convergence with greater confidence from small, delicate details at chip level to system-level design challenges.”
Osbert Cheng, vice president of device technology development and design support at UMC, agreed. He said, “We’re pleased with the result of our collaboration with Ansys in the delivery of UMC technology reference flow, which empowers customers to address growing performance, reliability and power demands for cloud and data center applications.”