Fin Field Effect Transistor abilities helps system on chip design.
(Image courtesy of ANSYS.)
Electronic design engineers might be interested to learn that ANSYS now meets Samsung Foundry’s qualification. This will help engineers ensure their chip designs are accurate and reliable by reducing development time, design costs and risks.
Electronics are becoming smaller and more powerful. However, there is a demand for them to work faster with less power. To meet this demand, engineers need to marry various subsystems of an electronic device with one or more integrated circuits called system on chip (SoC).
To help engineers design these SoCs, ANSYS and the Samsung Foundry worked together to ensure that the simulation software meets the accuracy and reliability for 14nm and 10nm Fin Field Effect Transistors (FinFET).
The collaboration between ANSYS and the Samsung Foundry has led to the creation of process design kits and electromigration flow tools. With these tools engineers can design, verify and green light SoC designs and other electronic intellectual properties faster. This can significantly reduce a design team’s time to market for their electronic devices.
“Our collaboration with Samsung Foundry on the qualification of process design kits and reference flows for the latest technologies empowers mutual customers to redefine their products by developing robust and reliable SoCs,” said John Lee, general manager at ANSYS.
These design kits and electromigration flow tools will help engineers ensure the power performance, efficiency and reliability of their electronic designs for the mobile, consumer and datacenter markets.
This update will have significant use for those designing:
- High performance computing (HPC)
- Mobile devices
- Automotive electronics
- Internet of Things designs
To see how ANSYS can help predict the warping and fatigue of printed circuit boards under thermal loads and perform other electronic simulations, check out this previous article.
