New Transistor Design Aims to Surpass Moore’s Law
Vincent Charbonneau posted on December 02, 2019 |

Silicon integrated circuits—found in computer processors, among many other devices—are quickly approaching the maximum feasible density of transistors on a single chip, limiting potential design improvements for future integrated circuits. Thanks to the work of a team of engineers at the University of Michigan (U-M), however, a new approach to transistor stacking promises to solve this issue before it negatively impacts processor designers.

Traditionally, transistors are constructed in a 2D configuration. This design includes an additional chip that converts between high- and low-voltage signals—a structure that currently stands between the low-voltage processing chips and the higher-voltage user interfaces.

Now, the team from U-M (led by Becky Peterson, associate professor of electrical engineering and computer science) has stacked a second layer of transistors directly atop a cutting-edge silicon chip—a 3D configuration that has eliminated the need for a second chip.

This second layer of transistors can handle higher voltages, which is useful because high voltages can easily damage silicon transistors, especially since such transistors are shrinking in size and cost roughly every two years, as stipulated by Moore’s Law.


Silicon integrated chip. (Image courtesy of Advanced Silicon.)
Silicon integrated chip. (Image courtesy of Advanced Silicon.)
Peterson’s team achieved success by utilizing a different kind of semiconductor, known as an amorphous metal oxide. To apply this semiconductor layer to the silicon chip without damaging it, they covered the chip with a solution containing zinc and tin, and then spun it to create an even coating.

Following that step, the team briefly baked the chip to dry it out. This process was repeated to make a layer of zinc-tin-oxide about 75 nanometers thick (about one-thousandth the thickness of a human hair). During a final bake, the metals bonded to oxygen in the air, creating a layer of zinc-tin-oxide.

“This enables a more compact chip with more functionality than what is possible with only silicon,” said Youngbae Son, the first author of the paper and recent doctoral graduate in electrical and computer engineering at U-M.

The advancements in silicon integrated chip technology established by Peterson and her team have the potential to revolutionize transistors and the methods engineers use to build complex devices—perhaps even going beyond the rate of progress dictated by Moore’s Law.

To learn more about this new method of silicon chip design, check out the complete study.

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