Ultra-Clean Fabrication Process Creates Ideal 2D Transistors
Edis Osmanbasic posted on September 30, 2019 |

A clean transferred contact. The structure is wire-bonded to a 16-pin chip-carrier. (Image courtesy of Columbia )
A clean transferred contact. The structure is wire-bonded to a 16-pin chip-carrier. (Image courtesy of Columbia )

For decades semiconductors have been essential in electronic devices such as transistors, diodes, microprocessors, and more. Transistors are the basic electronic component which contain three terminals (the base, collector, and the emitter) connected to silicon. In practice, the transistors are not ideal. Even when turned off, a small amount of current leaks out of the transistor, while an active transistor has a low resistance value causing a small saturation voltage across it. Both cases result in power dissipation in the device.

Columbia University  researchers have recently presented the fabrication process of two-dimensional (2D) semiconductors with several properties that can be used to create an almost ideal transistor. The technical paper, titled “Transferred via Contacts as a Platform for Ideal Two-dimensional Transistors,” has been published in Nature Electronics journal. The main goal of the innovation is a completely clean and damage-free fabrication process. The innovation is important due to the fact that making 2D devices with good and stable mechanical and electrical properties has proved to be challenging. The proposed method, which involves a direct-metallization process for making metal contacts, has vastly improved performance over conventional methods. With conventional devices, the contacts and surface are not shielded with a layer of protection against dirt and contamination during the fabrication.

The 2D semiconductors have nearly zero volume, thus any surface of dirt or contamination causes device degradation. “Making devices out of 2D materials is a messy business. Devices vary wildly from run to run and often degrade so fast that you see performance diminish while you’re still measuring them,” said James Teherani, one of the authors of the paper. 

The newly-presented fabrication method separates the pristine device from the messy fabrication process steps which cause variabilities and damages. Ultra-clean nanofabrication process preserves the active superconductor layer from the dirty fabrication steps. These steps involve dirty metallization, chemicals, and polymers used for making electrical connections to the device. When the dirty process is completed, the metal contacts are transferred onto the clean active 2D semiconductor layer, maintaining the integrity of the layers.

The transferred contacts are firstly made by metal embedded in insulating hexagonal boron nitride (hBN) outside a glovebox. When this is complete, the undamaged contact layer is dry-transferred onto the 2D semiconductor inside a nitrogen glovebox. The fabrication process is explained in this video made by the Columbia University researchers. 

The process provides encapsulation to protect the device and researchers have not detected any performance degradation over time. New fabrication process allows for making more complex structures which can consequently yield high-performance devices. The researchers have thus been able to create field-effect transistors (FETs) from bilayer p-type tungsten diselenide (WSe2) with high hole mobility and low contact resistance. The low contact resistance and clear contact surface allow making a nearly ideal top-gated p-FET with a subthreshold swing of 64 mV per decade at 290 K.

The presented fabrication process has been proven as stable and repeatable. Look for it to be relocated from the laboratory into the real world soon.


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