I've been describing the guts that power smartphones and tablets, including these major components:


Image courtesy Samsung Semiconductor
There is still one critical component that provides basic functionality on smart (and even not so smart) phones. That is the NAND flash memory that provides storage for your files even when the phone's battery goes dead.

Thinking back to comp sci 101, a computing platform needs a processing unit, memory to hold information during computation, and file storage along with input/output mechanisms. For the smartphone, the NAND flash memory completes the machine side of the processor-memory-storage trilogy.

The core of the non-volatile storage for mobile computers is NAND flash. The basic idea of all flash memory is that a charge can be stored on an extra gate inside a structure very similar to a typical MOS transistor. This extra gate is known as a floating gate since it is not accessed by direct contact to wiring. Instead, the device allows electrons to be stored on it during programming or removed from it during erase. The charge on this floating gate changes the transistor operation (threshold voltage shift), and voila, you have a non-volatile memory site.

During normal (just to avoid any messy device physics) conditions, the charges stay put since the floating gate is isolated on all sides by insulating materials. The floating gate cell doesn't require power flowing to the chip to keep the memory contents intact.

But there are myriad other factors that creep in (ahh yes, the rest is just engineering the physicist claims) when you want the device to be useful in the real world. Although the tried and true floating gate flash cell is very reliable in terms of the volatility (nothing maintains its state forever ) and the durability (number of times it can be written to), statistics dictates that there will be a range of actual conditions across a chip (billions of memory cells on these) and these will change over a number of erase-write cycles.

To ensure consistent and useful operation of NAND flash, some intelligence is required to keep the maximum number of cells in an operational range. Any time data is written to the device, complex algorithms and controls prevent the statistical spread of individual memory cell performance from widening. This is known as wear leveling.

To attract the widest market, flash manufacturers usually include a small microcontroller to handle the overhead of device reliability programming. The system is very much like the standard “memory stick” used to swap files between computers or the SD card in your camera. Your computer operating system is not burdened by these things, and the same is true of the smartphone.

The only difference is the physical configuration. The embedded flash with controller in most mobile devices today is an assembly of multiple chips within a single IC package. There are often as many as four flash memory chips stacked together with the microcontroller. The industry consortium known as the Multimedia Card Association calls it e-MMC™.

The statistical variation between sites and the changes over time is a complicated process to handle. The microcontroller must apply error correction codes (ECC) to enable bits on the memory that would otherwise be marked as unusable. Without ECC , the raw values coming out of memory cells cause far too many bad sites to be detected by the system. Internal correction keeps the memory chip useful with the nominal number of gigabytes specified by the manufacturer.

Even the memory needs to have a brain, and the e-MMC™ in your tablet or smartphone depends on having its own internal microcontroller to keep your operating system (and the manufacturers who buy these e-MMC devices by the millions) happy.

 

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